Lab Index
Provided below are a series of labs which can be used in conjuction with the Embedded Systems Design book. The procedures, schematics, materials, and steps have been provided as resources for an instructor or teaching assistant utilizing this book. These labs have been used at the University of California, Riverside for various classes and every attemp to eliminate inaccuracies have been made, however, we do not guaruntee that no inaccuracies exist. In additon, it is by no means the only way to implement these labs. These labs can be implemented using a variety of other software and hardware components.
Setup
Each laboratory requires different materials, the specific
materials requried on a per lab basis in the Lab Assignments table.
However, for convinence a "master list" of materials is provided.
It's an easy to use yet powerful VHDL simulator
written for Windows, and a great deal
for around $50.
Lab Tutorials
| Tutorial Title | Tutorial Description |
| ALDEC Active-VHDL Simulation Tutorial | Graphically shows the steps required to simulate a design in ALDEC Acitve-HDL |
| Aldec Active-HDL Simulation Tutorial 2 | Code is provided for a 1-bit adder and a corresponding testbench. Steps are given to show students how to simulate the design. The 1-bit adder is used to build a 4-bit adder. This code along with the corresponding testbench is also provided. Students then simulate the 4-bit adder design. |
| VHDL Synthesis tutorial | Tutorial shows students how to synthesize and download VHDL code unto an XS40 board. Tutorial provides code for a counter the counts up form 0 to F. The tutorial gives steps showing how to synthesize the code provided using Xilinx FPGA express to generate a bit stream. Then the bit stream is downloaded unto the XS40 board and the 7-segment LED on the board will count repeatedly from 0 to F. |
| 8051 tutorial | Tutorial provides code to blink an led using the 8051. The tutorial shows students how to compile the program using the c51 compiler, then run the program using the PDS51 emulation software. |
Lab Assignments
| Lab Title | Lab Description | Material Required | Relevant Chapter(s) |
| Introduction to FPGA's with schematic capture | The purpose of this lab is to design a 7-segment decoder using AND, OR, NAND, NOR, XOR, and XNOR gates. The circuit will read in a 4-bit binary value and output 7 signals (a through g), which correspond to a segment on the 7 segment display. The decoder will accept the binary value and light the appropriate led's so that the equivalent decimal value appears. |
Software
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| Introduction to FPGA's using VHDL | Follow-up to the "Introduction to FPGA's with schematic capture" lab. The 7-segment decoder circuit draw in the previous lab is translated into VHDL. The VHDL decoder is written structurally and simulated to test for correctness. |
Software
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| Introduction to VHDL Simulation and Synthesis |
Lab in which the student will implement a behavioral
description of a 2-bit counter whose output is fed to a
2-to-4 decoder. The decoder is then wired to 4 led's. As
it counts the led's light up according to the binary
equivalent. The design is first simulated in ALDEC
Acitve-HDL to check the functionality. Then the design
is synthesized using Xilinx FPGA express and downloaded
unto an XS40 board. |
Software
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| Synthesis | Follow-up to the "Introduction to FPGA's using VHDL" lab. In this lab the 7-segment decoder is re-written so that it is a behavioral description. The behavioral VHDL decoder is simulated to test for correctness. |
Software
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| ALU Design | The purpose of this lab is to build a 2-bit ALU. The ALU is written behaviorally. It should take in two numbers and be able to add the numbers, subtract the numbers, NOR the numbers, or NAND the numbers. A test bench is written for the design so that it can be simulated in ALDEC Acitve-HDL and tested for correctness. |
Software
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| 2-bit counter | The purpose of this lab is to write a VHDL description of 2-bit counter as a finite state machine (FSM). The 2-bit counter has several inputs such as clk, rst, enable, load, ... and should be able to reset, accept an input, count-up or count-down, etc... A testbench is written and the design is simulated using ALDEC to test for correctness. |
Software
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| FSM + D: GCD calculator | The purpose of this lab is to write a VHDL description of a GCD (greatest common divisor) calculator. The calculator accepts two numbers from the user/testbench and outputs the GCD. The calculator is divided into two parts - a controller and a datapath. The controller is the FSM which issues commands based on the current state and the external inputs. This portion can be a behavioral description. The datapath contains the netlist of functional units like mulitplexors, registers, subtractors, and a comparator. The algorithim to implement the GCD calculator is provided. A testbench is written and the design is simulated using ALDEC to test for correctness. |
Software
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| FSM + D: Parallel to Serial Convertor | The purpose of this lab is to write a VHDL description of a parallel to serial convertor as an FSMD. The parallel to serial convertor will accept an eight-bit number and send one bit of data over the data line per clock cycle. There is also a go bit which tells the convertor to start transmitting data. A testbench is written and the design is simulated using ALDEC to test for correctness. |
Software
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| FSM to FSM+D: Soda Machine Controller | The purpose of this lab is to implement a soda machine controller. The cost of a soda is 75 cents. The machine accepts quarters, dimes, and nickles. As the user feeds in the coins, the controller keeps tract of how much was inserted. Once the 75 cents have been inserted, the controller releases a soda. To simplify the lab, change will not be given. In addition there should be a reset and an enable to the system. A testbench is written and the design is simulated using ALDEC to test for correctness. |
Software
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| Microprocessor | The purpose of this lab is to implement a General Purpose Processor(GPP) in VHDL. The GPP, unlike a single purpose processor, can accomplish various tasks via programs written in an Instruction Set that the microprocessor can recognize. Most processors are built from a controller, datapath, and memory. For the purposes of this lab we will deviate from this processor architecture and have the memory integrated into the controller. An simplified instruction set is provided for this lab. Some skeletal VHDL code is provided for the controller, datapath, and, CPU as a starting point for students. A one's count algorithim is implemented. This algorithim counts the number of 1's appearing in an n-bit binary number. A testbench is written and the design is simulated using ALDEC to test for correctness. |
Software
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| Implementing a 4bit Counter using an 8051 and Interfacing it to an LCD | In this lab, students will learn how to write a simple C program for 80X51 micro-controller, compile it using the C51 compiler, emulate it on an emulator using PDS51, and learn how to use an LCD (Liquid Crystal Display). The program will be used to control a simple 4-bit up-down counter, capable of counting from 0 to 15. At each step the count should be displayed in decimal format on the LCD. |
Software
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| Implementing a Calculator Using Peripherals Like a Keypad and an LCD | In this lab, the student will build a simple calculator using the keypad as an input and the LCD as an output peripheral. After debugging and testing your program, the student will have to burn the compiled program to a standalone 8051 chip at the end of the lab. |
Software
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| Serial Communication | The purpose of this lab is to establish serial communication between the PC and the 8051. |
Software
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| A/D Conversion | The purpose of this lab is to be able to implement analog to digital conversion using the ADC0804LCN 8-bit A/D converter. The student will design a circuit and program the chip so that when an analog signal is given as input, the equivalent digital voltage is displayed on an LCD display. Thus, in effect, the circuit should function like a simple voltmeter. |
Software
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| Stepper Motor | The purpose of this lab is to control a stepper motor, with instructions received from the PC via a serial communication link to the 8051. |
Software
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| VHDL calculator | The purpose of this lab is to implement a finite state machine in VHDL to perform simple calculations like addition, subtraction, and multiplication. A testbench is written to check the functionality of the design. The program is downloaded unto the XS40 board and DIP switches are used to vary the inputs. |
Software
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| Bus Lab | VHDL implementation I2C bus protocol |
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| Bus Lab2 | VHDL implementation ISA bus protocol |
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| Memory Lab | Using EEPROMs |
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Additional Files/Handouts Needed for Lab
| File/Schematic Name | File/Schematic Description |
| 7display.html | Diagram of 7 segment display. Diagram shows which led's correspond to variables used in various labs. |
| 8051pin.gif | Pinout for the 8051. |
| clkdiv.vhd | VHDL clock divider |
| DIPconnect.gif | Schematic which shows the DIP switch connections to the XS40 board pins, shows the jumpers, and some tips on downloading unto the board. |
| lcd.c | File which contains functions used for the LCD. |
| lcd.h | Header file for functions used for the LCD. |
| serial.exe | Execuatable used for the stepper motor laboratory. The execuatble is used to transmit data from your PC to the 8051. |
| wrled.vhd | VHDL code used to write decimal values to the 7-segment display located on the XS40 board |
| Datasheet/Manual/Reference | Datasheet/Manual/Reference Description |
| ADC0801.pdf | Datasheet for the ADC0804LCN A/D convertor chip used in the Analog to Digital Conversion Lab |
| c51 Compiler Information | Information regarding the C51 compiler for the 8xc51 |
| LT1130.pdf |
Datasheet for the LT1130CN low power 5V RS232 Driver/Receiver
chip used in the Serial Communication Lab |
| pds51 Emulation Software Information | Information regarding the PDX51 Development System for the 80C51, steps required to compile, link you C program, Connecting the PDS51 board, and using the PDS51 software. |
| stepper.gif | Data sheet for the 2 Phase Bipolar Stepper Motor used in the Stepper Motor Lab |
| xs40manual.pdf | XS40 Board Manual |
| xs40sch.pdf | XS40 Board Schematic |
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